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L6258E 데이터시트(PDF) 11 Page - STMicroelectronics |
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L6258E 데이터시트(HTML) 11 Page - STMicroelectronics |
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11 / 24 page ![]() 11/24 L6258E 4 PWM CURRENT CONTROL LOOP 4.1 Open Loop Transfer Function Analysis Block diagram : refer to Fig. 6. Table 7. Application data: these data refer to a typical application, and will be used as an example during the analysis of the stability of the current control loop. The block diagram shows the schematics of the L6258E internal current control loop working in PWM mode; the current into the load is a function of the input control voltage VDAC , and the relation between the two variables is given by the following formula: Iload · RS · GS = VDAC · Gin where: VDAC is the control voltage defining the load current value Gin is the gain of the input transconductance amplifier ( 1/Ra ) Gs is the gain of the sense transconductance amplifier ( 1/Rb ) Rs is the resistor connected in series to the output to sense the load current In this configuration the input voltage is compared with the feedback voltage coming from the sense resistor, then the difference between this two signals is amplified by the error amplifier in order to have an error signal controlling the duty cycle of the output stage keeping the load current under control. It is clear that to have a good performance of the current control loop, the error amplifier must have an high DC gain and a large bandwidth . Gain and bandwidth must be chosen depending on many parameters of the application, like the characteristics of the load, power supply etc..., and most important is the stability of the system that must always be guaran- teed. To have a very flexible system and to have the possibility to adapt the system to any application, the error am- plifier must be compensated using an RC network connected between the output and the negative input of the same. For the evaluation of the stability of the system, we have to consider the open loop gain of the current control loop: VS = 24V Gs transconductance gain = 1/Rb LL = 12mH Gin transconductance gain = 1/Ra RL = 12Ω Ampl. of the Tria_0_180 ref. = 1.6V (peak to peak) RS = 0.33Ω Ra = 40KΩ RC = to be calculated Rb = 20KΩ CC = to be calculated Vr = Internal reference equal to VDD/2 (Typ. 2.5V) I LOAD R S 1 R b ------- ⋅⋅ V DAC 1 R a ------- ⋅ = I LOAD V DAC R b R a R s ⋅ ------------------ ⋅ 0.5 V DAC R S --------------- A () ⋅ == |
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