L6919E

18/33

MAIN CONTROL LOOP

The control loop is composed by the Current Sharing control loop and the Average Current Mode control loop.

Each loop gives, with a proper gain, the correction to the PWM in order to minimize the error in its regulation:

the Current Sharing control loop equalize the currents in the inductors while the Average Current Mode control

loop fixes the output voltage equal to the reference programmed by VID. Figure 13 reports the block diagram of

the main control loop.

Figure 13. Main Control Loop Diagram

Current Sharing (CS) Control Loop

Active current sharing is implemented using the information from Tran conductance differential amplifier in an

ternally built; the error between the read current and this reference is converted to a voltage with a proper gain

and it is used to adjust the duty cycle whose dominant value is set by the error amplifier at COMP pin (See fig. 14).

The current sharing control is a high bandwidth control loop allowing current sharing even during load transients.

The current sharing error is affected by the choice of external components; choose precise Rg resistor (±1% is

0

1

2

3

4

5

6

7

8

9

0.5

1.5

2.5

3.5

Output Voltage [V]

L=3

µH,

Vin=12V

L=2

µH,

Vin=12V

L=1.5

µH, Vin=12V

L=2

µH,

Vin=5V

L=1.5

µH,

Vin=5V

L=3

µH, Vin=5V

L1

L2

+

+

PWM1

1/5

+

-

1/5

4/5

PWM2

FB

COMP

ERROR

AMPLIFIER

REFERENCE

PROGRAMMED

BY VID

CURRENT

SHARING

DUTY CYCLE

CORRECTION

D02IN1392