34+0.3

-0.3

1.5X9

6

3.5

3.5

1.5X5

1

16

17

32

PRELIMINARY

Class1 UART Full Module

EYSF1UA**, EYSF1UA**-**

TAIYO YUDEN

Aug./2004 Ver.1.0

General Electrical Specification

DH5 packet , 921.6kbps,HCI,

TX=Max Power,VDD=3.3V

V

3.4

3.3

3.2

Operating Voltage (VDD_PA)

mA

180

135

Continues TX, ,VDD=3.3V

Peak Current

mA

56

Receive, (Slave)

Average Current Consumption 3

mA

0.9

Deep Sleep ,VDD=3.3V

Average Current Consumption 4

deg-C

+70

-20

General Operating temperature condition

V

0.4

-

Output Low Voltage

V

-

-

0.8VDD

Input High Voltage

V

-

-

VDD-0.6

Output High Voltage

mA

95

Send ,(Master)

Average Current Consumption 2

mA

43

Audio with HV3 ,VDD=3.3V ,

TX=Max Power, Slave

Average Current Consumption 1

V

0.2VDD

-

-

UART,PCM,GPIO

Input Low Voltage

-

5:1

No abnormal Oscillation

Load Impedance

dBm

-70

-81

RX Sensitivity

dBm

+20

+17

measured in 50 ohm,VDD_PA=VDD=3.3V

RF Output Power

V

VDD_PA

3.2

Operating Voltage (VDD)

GHz

2.480

2.402

Carrier Frequency

Units

Max.

Typ.

Min.

Description

Parameter

Block Diagram

Unit;mm

Features

•PC peripheral equipment

•Home Network , AV

•Access Point , FA etc

Applications

Outline

Note: The above PRELIMINARY data are not guaranteed and are subject to change without notice.

FLASH

ROM

RADIO

MATCHING

B.P.F

CRYSTAL

MHz

32

ARM7 TDMI

ROM / RAM

BB

PCM

PCM (4) UART (4) GPIO (4)

UART

GPIO

VDD

CRYSTAL

kHz

32

RESET

GND

JTAG (5)

VOLTAGE

REGULATOR

SW

MATCHING

PA

L.P.F

VDD_PA

JTAG

VOLTAGE

REGULATOR

•The module is a Max.20dBm( Class1 ) module.

( Ready for Optional Ver1.2 features )

•Internal baseband clock oscillator.

•Support functions

SCO links,ACL links,Piconet<7>,Hold,Sniff,Park,

Power Control

•Interface:UART,PCM,GPIO

•Protocol stack:

Under HCI firmware Type,

GAP+SDP+SPP+DUN+FAX+OPP+GOEP+HSP,

A2DP+AVRCP+AVDTP+GAVDP+AVCTP+(HSP),

HCRP+BIP +OPP+GOEP Stacked Type , etc

•Small outline.

34.0 x 15.6 x 2.4 mm

Non use