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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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EMC1822 데이터시트(PDF) 72 Page - Microchip Technology |
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EMC1822 데이터시트(HTML) 72 Page - Microchip Technology |
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72 / 103 page  8.11.28 Therm High Limit Status Register (Address 3Ch) Name: THERM LIMIT STATUS Offset: 0x3C Note: The Therm Limit Status register contains the Status bits that are set when a temperature channel Therm Limit is exceeded. If any of these bits are set, the THERM Status bit in the STATUS register is set. Reading from the Therm Limit Status register will not clear the Status bits. Once the temperature drops below the Therm Limit minus the Therm Hysteresis, the corresponding Status bits will be automatically cleared. The THERM bit in the STATUS register will be cleared when all individual channel THERM bits are cleared. Bit 7 6 5 4 3 2 1 0 E4THERM E3THERM E2THERM E1THERM ITHERM Access RO RO RO RO RO Reset 0 0 0 0 0 Bit 4 – E4THERM This bit is set when the External Diode 4 channel exceeds its programmed Therm Limit. When set, this bit will assert the THERM pin. Value Description 1 THERM pin asserted 0 THERM pin not asserted Bit 3 – E3THERM This bit is set when the External Diode 3 channel exceeds its programmed Therm Limit. When set, this bit will assert the THERM pin. Value Description 1 THERM pin asserted 0 THERM pin not asserted Bit 2 – E2THERM This bit is set when the External Diode 2 channel exceeds its programmed Therm Limit. When set, this bit will assert the THERM pin. Value Description 1 THERM pin asserted 0 THERM pin not asserted Bit 1 – E1THERM This bit is set when the External Diode 1 channel exceeds its programmed Therm Limit. When set, this bit will assert the THERM pin. Value Description 1 THERM pin asserted 0 THERM pin not asserted Bit 0 – ITHERM This bit is set when the Internal Diode channel exceeds its programmed Therm Limit. When set, this bit will assert the THERM pin. Value Description 1 THERM pin asserted Multi-Channel Low Voltage Temp Sens... System Management Bus Protocol © 2018 Microchip Technology Inc. Datasheet DS20006048A-page 72 |
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