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STM32L433CB 데이터시트(PDF) 132 Page - STMicroelectronics

부품명 STM32L433CB
상세설명  Ultra-low-power Arm® Cortex®-M4 32-bit MCUFPU, 100DMIPS, up to 256KB Flash, 64KB SRAM, USB FS, LCD, ext. SMPS
PDF  225 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32L433CB 데이터시트(HTML) 132 Page - STMicroelectronics

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Electrical characteristics
STM32L433xx
132/225
DS11449 Rev 5
Note:
For information on selecting the crystal, refer to the application note AN2867 “Oscillator
design guide for ST microcontrollers” available from the ST website www.st.com.
Figure 23. Typical application with an 8 MHz crystal
1. REXT value depends on the crystal characteristics.
Low-speed external clock generated from a crystal resonator
The low-speed external (LSE) clock can be supplied with a 32.768 kHz crystal resonator
oscillator. All the information given in this paragraph are based on design simulation results
obtained with typical external components specified in Table 57. In the application, the
resonator and the load capacitors have to be placed as close as possible to the oscillator
pins in order to minimize output distortion and startup stabilization time. Refer to the crystal
resonator manufacturer for more details on the resonator characteristics (frequency,
package, accuracy).
MS19876V1
(1)
OSC_IN
OSC_OUT
RF
Bias
controlled
gain
fHSE
REXT
8 MHz
resonator
Resonator with integrated
capacitors
CL1
CL2
Table 57. LSE oscillator characteristics (fLSE = 32.768 kHz)(1)
Symbol
Parameter
Conditions(2)
Min
Typ
Max
Unit
IDD(LSE) LSE current consumption
LSEDRV[1:0] = 00
Low drive capability
-250
-
nA
LSEDRV[1:0] = 01
Medium low drive capability
-315
-
LSEDRV[1:0] = 10
Medium high drive capability
-500
-
LSEDRV[1:0] = 11
High drive capability
-630
-
Gmcritmax
Maximum critical crystal
gm
LSEDRV[1:0] = 00
Low drive capability
--
0.5
µA/V
LSEDRV[1:0] = 01
Medium low drive capability
-
-
0.75
LSEDRV[1:0] = 10
Medium high drive capability
--
1.7
LSEDRV[1:0] = 11
High drive capability
--
2.7
tSU(LSE)(3) Startup time
VDD is stabilized
-
2
-
s



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