전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

STUSB4710 데이터시트(PDF) 9 Page - STMicroelectronics

부품명 STUSB4710
상세설명  Autonomous USB PD controller with integrated discharge path
PDF  34 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STUSB4710 데이터시트(HTML) 9 Page - STMicroelectronics

Back Button STUSB4710 Datasheet HTML 5Page - STMicroelectronics STUSB4710 Datasheet HTML 6Page - STMicroelectronics STUSB4710 Datasheet HTML 7Page - STMicroelectronics STUSB4710 Datasheet HTML 8Page - STMicroelectronics STUSB4710 Datasheet HTML 9Page - STMicroelectronics STUSB4710 Datasheet HTML 10Page - STMicroelectronics STUSB4710 Datasheet HTML 11Page - STMicroelectronics STUSB4710 Datasheet HTML 12Page - STMicroelectronics STUSB4710 Datasheet HTML 13Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 9 / 34 page
background image
STUSB4710
Inputs/outputs
DocID030499 Rev 4
9/34
2.3.4
VBUS_EN_SRC
In source power role, this pin allows the outgoing VBUS power to be enabled when the
connection to a sink is established and VBUS is in the valid operating range. The open-drain
output allows a PMOS transistor to be driven directly. The logic value of the pin is also
advertised in a dedicated I2C register bit.
2.3.5
VDD
VDD is the main power supply for applications powered by VBUS.
This pin can be used to sense the voltage level of the main power supply providing VBUS. It
allows UVLO and OVLO voltage thresholds to be considered independently on VDD pin as
additional conditions to enable the VBUS power path through VBUS_EN_SRC pin.
2.3.6
GND
Ground.
2.3.7
ADDR0
At start-up, this pin is latched to set I²C device address 0 bit.
2.3.8
VREG2V7
This pin is used for external decoupling of 2.7 V internal regulator only .
Recommended decoupling capacitor: 1 µF typ. (0.5 µF min.; 10 µF max.).
This pin must not be used to supply any external component.
2.3.9
VBUS_DISCH
Control signal for external VBUS_DISCH path.
2.3.10
SEL_PDO [5:2]
These 4 output signals are asserted (active low) respectively when PDO2, PDO3, PDO4
and PDO5 are selected by the attached sink. These signals are used to pilot the power
management unit.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com