VSC8504-02 datasheet(114/131 Pages) MICROSEMI

114 / 131 page

Electrical Specifications

VMDS-10507 VSC8504-02 Datasheet Revision 4.2

103

Figure 48 •

Serial Management Interface Timing

5.2.12

Reset Timing

This section contains the AC specifications that apply to device reset functionality. The signal applied to

the NRESET input must comply with the specifications listed in the following table.

MDC fall time

100

tCYC × 10%(1)

MDC to MDIO

valid

tCO

300

Time-dependant on

the value of the

external pull-up

resistor on the MDIO

For fCLK above 1 MHz, the minimum rise time and fall time is in relation to the frequency of the MDC clock

period. For example, if fCLK is 2 MHz, the minimum clock rise time and fall time is 50 ns.

Table 123 •

Reset Timing Specifications

Parameter

Symbol Minimum

Maximum

Unit

NRESET assertion time after power

supplies and clock stabilize

2ms

Recovery time from reset inactive to

device fully active

tREC

105

NRESET pulse width

tW(RL)

100

Wait time between NRESET de-assert

and access of the SMI interface

tWAIT

105

Table 122 •

Serial Management Interface AC Characteristics (continued)

Parameter

Symbol Minimum

Typical

Maximum

Unit Condition

tCYC

tWL

tWH

tSU

tCO

Data

MDIO

(read)

MDIO

(write)

MDC

VSC8504-02 데이터시트(PDF) 114 Page - Microsemi Corporation

VSC8504-02 데이터시트(HTML) 114 Page - Microsemi Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL