| 전자부품 데이터시트 검색엔진 |
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CS61880 데이터시트(PDF) 56 Page - Cirrus Logic |
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CS61880 데이터시트(HTML) 56 Page - Cirrus Logic |
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56 / 70 page ![]() CS61880 56 DS450PP3 19.6 Jitter Attenuator Characteristics (TA = -40 ° C to 85° C; TV+, RV+ = 3.3 V ±5%; GND = 0 V) Notes: 17. Attenuation measured with sinusoidal input filter equal to 3/4 of measured jitter tolerance. Circuit attenuates jitter at 20 dB/decade above the corner frequency. Output jitter can increase significantly when more than 28 UI’s are input to the attenuator. 18. Measurement is not effected by the position of the Jitter Attenuator. Parameter Min. Typ Max Units Jitter Attenuator Corner Frequency Note 10, 18 (Depends on JACF Bit in host mode) - - 1.25 2.50 - - Hz E1 Jitter Attenuation 3 Hz to 40 Hz Note 10, 17 400 Hz to 100 kHz + 0.5 -19.5 - - - - dB Attenuator Input Jitter Tolerance before FIFO 32-bit FIFO over flow and under flow Note 10 64-bit FIFO - - 24 56 - - UI UI Delay through Jitter Attenuator Only 32-bit FIFO Note 10 64-bit FIFO - - 16 32 - - UI UI Intrinsic Jitter in Remote Loopback Notes 10, 16 -- 0.11 UI 110 100 1K 10K 0 Frequency in Hz + 0.5 2 57 1.4K 20 400 40 + 10 - 10 - 20 - 30 - 50 - 40 - 60 - 19.5 - 6 - 70 100K ITU G.736 TYP. E1 @ 1.25 Hz CF TYP. E1 @ 2.5 Hz CF Figure 18. Jitter Transfer Characteristic vs. G.736 & TBR 12/13 |
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