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PRMB11 데이터시트(PDF) 1 Page - Nexperia B.V. All rights reserved |
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PRMB11 데이터시트(HTML) 1 Page - Nexperia B.V. All rights reserved |
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1 / 13 page ![]() PRMB11 50 V, 100 mA PNP/PNP Resistor-Equipped double Transistors (RET) 14 September 2018 Product data sheet 1. General description PNP/PNP Resistor-Equipped double Transistors (RET) in an ultra small DFN1412-6 (SOT1268) leadless Surface-Mounted Device (SMD) plastic package. NPN/NPN complement: PRMH11. NPN/PNP complement: PRMD3. 2. Features and benefits • 100 mA output current capability • Built-in bias resistors • Simplifies circuit design • Reduces component count • Reduces pick and place costs • Low package height of 0.5 mm • AEC-Q101 qualified 3. Applications • Digital applications • Cost-saving alternative to BC847/BC857 series in digital applications • Control of IC inputs • Switching loads 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit Per transistor VCEO collector-emitter voltage open base - - -50 V IO output current - - -100 mA hFE DC current gain VCE = -5 V; IC = -5 mA; Tamb = 25 °C 30 - - R1 bias resistor 1 [1] 7 10 13 kΩ R2/R1 bias resistor ratio Tamb = 25 °C [1] 0.8 1 1.2 [1] See section "Test information" for resistor calculation and test conditions. |
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