| 전자부품 데이터시트 검색엔진 |
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74AXP2T08GF 데이터시트(PDF) 9 Page - Nexperia B.V. All rights reserved |
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74AXP2T08GF 데이터시트(HTML) 9 Page - Nexperia B.V. All rights reserved |
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9 / 16 page ![]() Nexperia 74AXP2T08 Dual supply, dual 2-input AND gate 12. Waveforms, graphs and test circuit aaa-018938 tTLH tTHL tPLH tPHL VM VM VM VI VOH VOL nY output nA, nB input 0 V VM 10 % 10 % 90 % 90 % Measurement points are given in Table 12. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 5. Input nA, nB to output nY propagation delay times and output transition times Table 12. Measurement points Supply voltage Output Input VCCI VCCO VM VM VI 0.75 V to 2.7 V 1.2 V to 5.5 V 0.5VCCO 0.5VCCI VCCI CL (pF) 0 120 90 30 60 aaa-018538 2 4 6 tpd (ns) 0 (1) (2) (3) Tamb = -40 °C to +85 °C unless otherwise specified. (1) Minimum: VCCO = 5.5 V (2) Typical: Tamb = 25 °C; VCCO = 5 V (3) Maximum: VCCO = 4.5 V Fig. 6. Additional propagation delay versus load capacitance CL (pF) 0 120 90 30 60 aaa-018539 2 4 6 tpd (ns) 0 (2) (3) (1) Tamb = -40 °C to +85 °C unless otherwise specified. (1) Minimum: VCCO = 3.6 V (2) Typical: Tamb = 25 °C; VCCO = 3.3 V (3) Maximum: VCCO = 3 V Fig. 7. Additional propagation delay versus load capacitance 74AXP2T08 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved Product data sheet Rev. 4 — 27 March 2019 9 / 16 |
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