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CS4364 데이터시트(PDF) 31 Page - Cirrus Logic |
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CS4364 데이터시트(HTML) 31 Page - Cirrus Logic |
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31 / 50 page ![]() DS619A1 31 CS4364 3.14.3 SPI™ Mode In SPI mode, data is clocked into the serial control data line, CDIN, by the serial control port clock, CCLK (see Figure 25 for the clock to data relationship). There is no AD0 pin. Pin CS is the chip select signal and is used to control SPI writes to the control port. When the device detects a high to low transition on the AD0/CS pin after power-up, SPI mode will be selected. All signals are inputs and data is clocked in on the rising edge of CCLK. 3.14.3.1 SPI Write To write to the device, follow the procedure below while adhering to the control port Switching Specifica- tions in Section 2. 1. Bring CS low. 2. The address byte on the CDIN pin must then be 00110000. 3. Write to the memory address pointer, MAP. This byte points to the register to be written. 4. Write the desired data to the register pointed to by the MAP. 5. If the INCR bit (see Section 3.14.1) is set to 1, repeat the previous step until all the desired registers are written, then bring CS high. 6. If the INCR bit is set to 0 and further SPI writes to other registers are desired, it is necessary to bring CS high, and follow the procedure detailed from step 1. If no further writes to other registers are de- sired, bring CS high. 3.15 Memory Address Pointer (MAP) 3.15.1 INCR (Auto Map Increment Enable) Default = ‘0’ 0 - Disabled 1 - Enabled 3.15.2 MAP4-0 (Memory Address Pointer) Default = ‘00000’ 76543210 INCR Reserved Reserved MAP4 MAP3 MAP2 MAP1 MAP0 00000000 MAP MSB LSB DATA byte 1 byte n R/W M AP = M em ory Address Pointer ADDRESS CHIP CDIN CCLK CS 0011000 Figure 25. Control Port Timing, SPI Mode |
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