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X5083P 데이터시트(PDF) 2 Page - Intersil Corporation

부품명 X5083P
상세설명  CPU Supervisor with 9Kbit SPI EEPROM
PDF  20 Pages
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제조업체  INTERSIL [Intersil Corporation]
홈페이지  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

X5083P 데이터시트(HTML) 2 Page - Intersil Corporation

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2
FN8127.2
September 16, 2005
Typical Application
Block Diagram
uC
RESET
CS
SCK
SI
SO
WP
VCC
VSS
RESET
SPI
VCC
VSS
X5083
2.7-5.0V
10K
WATCHDOG
TIMER
COMMAND
DECODE &
CONTROL
LOGIC
SI
SO
SCK
CS/WDI
VCC
POR AND LOW
GENERATION
VTRIP
+
-
RESET (X5083)
VOLTAGE RESET
PROTECT LOGIC
8KBITS
EEPROM
WATCHDOG
DETECTOR
WP
ARRAY
STATUS
REGISTER
TRANSITION
RESET
RESET & WATCHDOG
TIMEBASE
X5083
STANDARD VTRIP LEVEL
SUFFIX
4.63V (+/-2.5%)
-4.5A
4.38V (+/-2.5%)
-4.5
2.93V (+/-2.5%)
-2.7A
2.63V (+/-2.5%)
-2.7
See “Ordering Information” on page 3 for
more details
For Custom Settings, call Intersil.
X5083



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