HD64F3694F datasheet(13/432 Pages) RENESAS

13 / 432 page

Rev. 4.00, 03/04, page xiii of xxviii

Section 12 Timer W ...........................................................................................145

12.1

Features............................................................................................................................. 145

12.2

Input/Output Pins .............................................................................................................. 147

12.3

Register Descriptions ........................................................................................................ 148

12.3.1 Timer Mode Register W (TMRW) ...................................................................... 149

12.3.2 Timer Control Register W (TCRW) .................................................................... 150

12.3.3 Timer Interrupt Enable Register W (TIERW) ..................................................... 151

12.3.4 Timer Status Register W (TSRW) ....................................................................... 152

12.3.5 Timer I/O Control Register 0 (TIOR0) ................................................................ 153

12.3.6 Timer I/O Control Register 1 (TIOR1) ................................................................ 155

12.3.7 Timer Counter (TCNT)........................................................................................ 156

12.3.8 General Registers A to D (GRA to GRD)............................................................ 156

12.4

Operation .......................................................................................................................... 157

12.4.1 Normal Operation ................................................................................................ 157

12.4.2 PWM Operation................................................................................................... 161

12.5

Operation Timing.............................................................................................................. 165

12.5.1 TCNT Count Timing ........................................................................................... 165

12.5.2 Output Compare Output Timing .......................................................................... 165

12.5.3 Input Capture Timing........................................................................................... 166

12.5.4 Timing of Counter Clearing by Compare Match ................................................. 167

12.5.5 Buffer Operation Timing ..................................................................................... 167

12.5.6 Timing of IMFA to IMFD Flag Setting at Compare Match................................. 168

12.5.7 Timing of IMFA to IMFD Setting at Input Capture ............................................ 169

12.5.8 Timing of Status Flag Clearing............................................................................ 169

12.6

Usage Notes ...................................................................................................................... 170

Section 13 Watchdog Timer ..............................................................................173

13.1

Features............................................................................................................................. 173

13.2

Register Descriptions ........................................................................................................ 174

13.2.1 Timer Control/Status Register WD (TCSRWD).................................................. 174

13.2.2 Timer Counter WD (TCWD)............................................................................... 175

13.2.3 Timer Mode Register WD (TMWD) ................................................................... 176

13.3

Operation .......................................................................................................................... 177

Section 14 Serial Communication Interface3 (SCI3) ........................................179

14.1

Features............................................................................................................................. 179

14.2

Input/Output Pins .............................................................................................................. 181

14.3

Register Descriptions ........................................................................................................ 181

14.3.1 Receive Shift Register (RSR) .............................................................................. 182

14.3.2 Receive Data Register (RDR) .............................................................................. 182

14.3.3 Transmit Shift Register (TSR) ............................................................................. 182

14.3.4 Transmit Data Register (TDR)............................................................................. 182

14.3.5 Serial Mode Register (SMR) ............................................................................... 183

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