TLC3544CPWRG4 datasheet(26/40 Pages) TI

26 / 40 page

TLC3544, TLC3548

5-V ANALOG, 3-/5-V DIGITAL, 14-BIT, 200-KSPS, 4-/8-CHANNELS SERIAL

ANALOG-TO-DIGITAL CONVERTERS WITH 0-5 V (PSEUDODIFFERENTIAL) INPUTS

SLAS266C – OCTOBER 2000 – REVISED MAY 2003

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

conversion operation (continued)

***

Hi-Z

Data Lost

Hi-Z

Select Channel

Possible

Signal

t(sample)

t(convert)

Select Channel

16 SCLK

Select Channel

16 SCLK

Previous Conversion Result

CS Tied to Low

CSTART

SDI

INT

EOC

SDO

Hi-Z

Conversion Result

Don’t Care

Possible Signal

Figure 14. Mode 00, CSTART Triggers Sampling/Conversion, FS Initiates Select

Hi-Z

***

Select CH1

Select CH2

1/4 FIFO FULL

Don’t Care

***

–– WRITE CFR

–– Select Channel

–– FIFO Read

Select Any

Channel

Select Any

Channel

Possible Signal

DATA1 of CH1 DATA2 of CH1

MODE 01, FS Activates Conversion, FIFO Threshold = 1/4 Full

Read FIFO After Threshold Is Hit

SDI

SDO

INT

DATA1 of CH2 DATA2 of CH2

Figure 15. Mode 01, FS Initiates Operations

Hi-Z

***

1/4 FIFO FULL

Don’t Care

***

–– WRITE CFR

–– Select Channel

–– FIFO Read

Select CH1

Select CH2

DATA1 of CH1 DATA2 of CH1

DATA1 of CH2 DATA2 of CH2

MODE 01, FS Initiates Select Period, CSTART Activates Conversion, FIFO Threshold = 1/4 Full,

Read FIFO After Threshold Is Hit

CSTART

SDI

SDO

INT

Possible Signal

Figure 16. Mode 01, CSTART Triggers Samplings/Conversions

TLC3544CPWRG4 데이터시트(PDF) 26 Page - Texas Instruments

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