PCF2129T datasheet(23/86 Pages) PHILIPS

23 / 86 page

PCF2129

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Product data sheet

Rev. 7 — 19 December 2014

23 of 86

NXP Semiconductors

PCF2129

Accurate RTC with integrated quartz crystal for industrial applications

8.7 Reset function

The PCF2129 has a Power-On Reset (POR) and a Power-On Reset Override (PORO)

function implemented.

8.7.1 Power-On Reset (POR)

The POR is active whenever the oscillator is stopped. The oscillator is considered to be

stopped during the time between power-on and stable crystal resonance (see Figure 12).

This time may be in the range of 200 ms to 2 s depending on temperature and supply

voltage. Whenever an internal reset occurs, the oscillator stop flag is set (OSF set

logic 1).

The OTP refresh (see Section 8.3.2 on page 13) should ideally be executed as the first

instruction after start-up and also after a reset due to an oscillator stop.

(1) Theoretical state of the signals since there is no power.

(2) The oscillator stop flag (OSF), set logic 1, indicates that the oscillation has stopped and a reset has

occurred since the flag was last cleared (OSF set logic 0). In this case, the integrity of the clock

information is not guaranteed. The OSF flag is cleared by command.

Fig 11. Power failure event due to battery discharge: reset occurs

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