MMA8652FC datasheet(27/65 Pages) NXP

27 / 65 page

MMA8652FC

Sensors

Freescale Semiconductor, Inc.

6.4

FIFO registers

The following registers are used to configure the FIFO. For more information about the FIFO, see application note AN4083, Data

Manipulation and Basic Settings for Xtrinsic MMA865xFC Accelerometers.

6.4.1

0x00: F_STATUS FIFO Status register (F_MODE > 0)

When F_MODE > 0, Register 0x00 becomes the FIFO Status Register, which is used to retrieve information about the FIFO. The

FIFO Status Register has a flag for the overflow and watermark, and also has a counter (which can be read to obtain the number

of samples stored in the buffer when the FIFO is enabled).

The F_OVF and F_WMRK_FLAG flags remain asserted while the event source is still active, but you can clear the FIFO interrupt

bit flag in the interrupt source register (INT_SOURCE) by reading the F_STATUS register. In this case, the SRC_FIFO bit in the

INT_SOURCE register will be set again when the next data sample enters the FIFO. Therefore, the F_OVF bit flag will remain

asserted while the FIFO has overflowed and the F_WMRK_FLAG bit flag will remain asserted while the F_CNT value is equal to

or greater than then F_WMRK value.

•

If the FIFO overflow flag is cleared and F_MODE = 11, then the FIFO overflow flag will remain 0 before the trigger event

(even if the FIFO is full and overflows).

•

If the FIFO overflow flag is set and F_MODE is = 11, then the FIFO has stopped accepting samples.

6.4.2

0x09: F_SETUP FIFO Setup register

Table 16. 0x00 F_STATUS: FIFO STATUS register (Read-Only)

Back to Register Address Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

F_OVF

F_WMRK_FLAG

F_CNT5

F_CNT4

F_CNT3

F_CNT2

F_CNT1

F_CNT0

Table 17. FIFO Flag Event

F_OVF

F_WMRK_FLAG

Event Description

—

No FIFO overflow events were detected.

—

FIFO event was detected; the FIFO has overflowed.

—

No FIFO watermark events were detected.

—1

FIFO Watermark event was detected, which means that the FIFO sample count is greater than

watermark value.

If F_MODE = 11, then a Trigger Event was detected.

Table 18. FIFO Sample Count register

Bit(s)

Field

Description

5–0

F_CNTX[5:0]

FIFO sample counter

Indicates the number of acceleration samples currently stored in the FIFO buffer.

• Count 00_0000 indicates that the FIFO is empty. (Default value)

• 00_0001 to 10_0000 indicates that 1 to 32 samples are stored in the FIFO.

Table 19. 0x09 F_SETUP: FIFO Setup register (Read/Write)

Back to Register Address Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

F_MODE1

F_MODE0

F_WMRK5

F_WMRK4

F_WMRK3

F_WMRK2

F_WMRK1

F_WMRK0

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