Rev.P6

9

VPN12AD1E-FU

APPLICATIONS INFORMATION: (Cont.)

RECOMMENDATION LAYOUT GUIDE:

In order to achieve stable, low losses, less noise or spike, and good thermal performance some layout

considerations are necessary. The recommendation layout is shown as Figure 10.

1. The ground connection between pin 1~3, 9~13, 44~49, 56~60 should be a solid ground plane

under the module. It can be connected one or more ground plane by using several Vias.

2. Place ceramic capacitors between pin 50 ~ 56 (VIN), and pin 1~3, 57~60 (GND) for input side; and

pin 27 ~ 42 (VOUT), and pin 44~49 (GND) for output side, as close to module as possible to

minimize high frequency noise.

4. Use large copper area for power path (VIN, VOUT, and GND) to minimize the conduction loss and

enhance heat transferring. Also, use multiple Vias to connect power planes in different layer.

5. Bottom layer layout with Continuous ground plane for good EMI design.

FIG.10 Recommendation TOP Layout

FIG.11 Recommendation Bottom Layout