DS280DF810ABVT datasheet(8/51 Pages) TI1

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DS280DF810

SNLS538A – SEPTEMBER 2016 – REVISED OCTOBER 2019

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(1)

Steps must be taken to ensure the combined AC plus DC supply noise meets the specified VDD supply voltage limits.

(2)

Steps must be taken to ensure the operating junction temperature range and ambient temperature stay-in-lock range (TEMPLOCK+,

TEMPLOCK-) are met. Refer to Timing Requirements, Retimer Jitter Specifications for more details concerning TEMPLOCK+ and

TEMPLOCK-.

7.3 Recommended Operating Conditions

Over operating free-air temperature range (unless otherwise noted).

MIN

MAX

UNIT

VDD

Supply voltage, VDD to GND. DC plus AC power should not exceed these limits.

2.375

2.625

NVDD

Supply noise, DC to < 50 Hz, sinusoidal(1)

250

mVpp

NVDD

Supply noise, 50 Hz to 10 MHz, sinusoidal(1)

mVpp

NVDD

Supply noise, >10 MHz, sinusoidal(1)

mVpp

TrampVDD

VDD supply ramp time, from 0 V to 2.375 V

150

μs

Operating junction temperature

-40

110

ºC

Operating ambient temperature

-40

85(2)

ºC

VIO2.5V

2.5 V I/O voltage (LVCMOS, CMOS and Analog)

2.375

2.625

VIO3.3V,INT_N

Open Drain LVCMOS I/O voltage (INT_N)

3.6

VIO3.3V

Open Drain LVCMOS I/O voltage (SDA, SDC)

2.375

3.6

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report, SPRA953.

(2)

No heat sink or airflow was assumed for these estimations. Depending on the application, a heat sink, faster airflow, or reduced ambient

temperature (<85 C) may be required in order to meet the maximum junction temperature specification per the Recommended

Operating Conditions.

7.4 Thermal Information

THERMAL METRIC(1)

CONDITIONS/ASSUMPTIONS(2)

DS280DF810

UNIT

FC/CSP (ABV)

135 PINS

RθJA

Junction-to-ambient thermal resistance

4-Layer JEDEC Board

26.4

°C/W

10-Layer 8-in x 6-in Board

9.3

20-Layer 8-in x 6-in Board

8.5

30-Layer 8-in x 6-in Board

8.2

RθJC(top)

Junction-to-case (top) thermal resistance

4-Layer JEDEC Board

1.6

°C/W

RθJB

Junction-to-board thermal resistance

4-Layer JEDEC Board

9.3

°C/W

ΨJT

Junction-to-top characterization parameter

4-Layer JEDEC Board

0.1

°C/W

10-Layer 8-in x 6-in Board

0.1

20-Layer 8-in x 6-in Board

0.1

30-Layer 8-in x 6-in Board

0.1

ΨJB

Junction-to-board characterization parameter

4-Layer JEDEC Board

9.3

°C/W

10-Layer 8-in x 6-in Board

5.0

20-Layer 8-in x 6-in Board

4.9

30-Layer 8-in x 6-in Board

4.6

7.5 Electrical Characteristics

Over operating free-air temperature range (unless otherwise noted).

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Rbaud

Input data rate

Full-rate

20.2

28.4

Gbps

Half-rate

10.1

14.2

Gbps

Quarter-rate

5.05

7.1

Gbps

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