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8

SN74HCS03

SCLS777 – JUNE 2020

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8 Detailed Description

8.1 Overview

This device contains four independent 2-input NAND gates with open-drain outputs and Schmitt-trigger inputs.

Each gate performs the Boolean function Y = A

● B in positive logic.

8.2 Functional Block Diagram

8.3 Feature Description

8.3.1 CMOS Open-Drain Outputs

output is not actively pulling the line low, it will go into a high impedance state. This allows the device to be used

for a wide variety of applications, including up-translation and down-translation, as the output voltage can be

determined by an external pull-up resistor.

The current drive capability of this device creates fast edges into light loads, so routing and load conditions

should be considered to prevent ringing. Additionally, the outputs of this device are capable of driving larger

currents than the device can sustain without being damaged. It is important for the power output of the device to

be limited to avoid thermal runaway and damage due to over-current. The electrical and thermal limits defined

the in the Absolute Maximum Ratingsmust be followed at all times.

8.3.2 CMOS Schmitt-Trigger Inputs

Standard CMOS inputs are high impedance and are typically modeled as a resistor in parallel with the input

capacitance given in the Electrical Characteristics. The worst case resistance is calculated with the maximum

input voltage, given in the Absolute Maximum Ratings, and the maximum input leakage current, given in the

Electrical Characteristics, using ohm's law (R = V ÷ I).

which makes this device extremely tolerant to slow or noisy inputs. While the inputs can be driven much slower

than standard CMOS inputs, it is still recommended to properly terminate unused inputs. Driving the inputs slowly

will also increase dynamic current consumption of the device. For additional information regarding Schmitt-trigger

inputs, please see Understanding Schmitt Triggers.