4

ATSAM9743

1773B–DRMSD–11/02

memory, or in external ROM. The combination of localized micro-program memory and local-

ized parameter data allows microinstructions to execute in 31 ns (32 MIPS). Separate buses

from each of the on-chip parameter RAM memory banks allow highly parallel data movement

to increase the effectiveness of each microinstruction. With this architecture, a single microin-

struction can accomplish up to 6 simultaneous operations (add, multiply, load, store, etc.),

providing a potential throughput of 192 million operations per second (MOPS).

P16 Control

Processor and I/O

Functions

The P16 control processor is a general-purpose 16-bit CISC processor core, which runs from

external memory. A debug ROM is included on-chip for easy development of firmware directly

on the target system. This ROM also contains the necessary code to directly program the

built-in Flash memory. The P16 includes 256 words of local RAM data memory for use as reg-

isters, scratchpad data and stack.

The P16 control processor writes to the parameter RAM blocks within the DSP core in order to

control the synthesis process. In a typical application, the P16 control processor parses and

interprets incoming commands from the MIDI UART and then controls the DSP by writing into

the parameter RAM banks in the DSP core. Slowly changing synthesis functions, such as

LFOs, are implemented in the P16 control processor by periodically updating the DSP param-

eter RAM variables.

The P16 control processor interfaces with other peripheral devices, such as the system control

and status registers, the on-chip MIDI UART, the on-chip timers and the Ports & Flash control

registers through specialized “intelligent” peripheral I/O logic. This I/O logic automates many of

the system I/O transfers to minimize the amount of overhead processing required from the

P16.

Memory

Management Unit

(MMU)

The Memory Management Unit (MMU) block allows Flash and/or RAM memory resources to

be shared between the synthesis/DSP and the P16 control processor. This allows the single

built-in Flash memory to serve as sample memory storage for the DSP and as program stor-

age for the P16 control processor. An internal 2K x 16 RAM is also connected to the MMU,

allowing RAM resources to be shared between the DSP and the P16. Similarly, when using

external memory, corresponding memory resources can be shared between the DSP and the

P16.