BTS71040-4ESE datasheet(21/82 Pages) INFINEON

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Data Sheet

Rev. 1.00

2018-10-16

BTS71040-4ESE

SPOC™+2

Power Supply

The BTS71040-4ESE is supplied by two supply voltages:

• Power Supply Voltage (VS)

• Digital Supply Voltage (VDD)

The VS supply line is connected to a battery feed and used for the driving circuitry of the power stages, while

VDD is used for the SPI logic and for driving SO pin. VS and VDD supply voltages have an undervoltage detection

circuit, which prevents the activation of the associated function in case the measured voltage is below the

undervoltage threshold. More in detail:

• An undervoltage on VDD supply prevents SPI communication. SPI registers are reset to their default values

• An undervoltage on VS supply switches OFF all channels, even in Limp Home mode. The channels are

enabled again as soon as VS ≥ VS(OP)

The voltage at pin VS is also monitored. In case of a negative voltage transient on VS resulting in VS < VS(TP) when

the device is out of Sleep mode, any SPI command sent by the microcontroller is not accepted (see

Chapter 6.2 and Chapter 10.5 for further information). An overview of channel behavior according to

different VS and VDD supply voltages is shown in Table 9.

Table 9

Device capability as function of VS and VDD1)

1) Valid after a successful supply voltage ramp-up.

VDD ≤ VDD(PO)

(VDD(PO) see P_6.4.1.1)

VDD > VDD(PO)

VS ≤ VS(TP)

(VS(TP) see P_6.4.0.5)

Channels are OFF

SPI registers reset

SPI registers protected

SPI communication not available

(fSCLK = 0 MHz)

SPI communication available2)

(fSCLK = 5 MHz)

2) Write commands are ignored. Furthermore the device responds with STDDIAG only.

Limp Home mode not available

VS(TP) < VS ≤ VS(UV)

(VS(UV) see P_6.4.0.1)

Channels are OFF

SPI registers reset

SPI registers available

SPI communication not available

(fSCLK = 0 MHz)

SPI communication available

(fSCLK = 5 MHz)

Limp Home mode available

(channels are OFF)

Limp Home mode available

(channels are OFF)

VS > VS(UV)3)

3) The undervoltage condition on VS supply must be considered. See Chapter 6.2.

Channels cannot be controlled by SPI

Channels can be controlled by SPI

SPI registers reset

SPI registers available

SPI communication not available

(fSCLK = 0 MHz)

SPI communication available

(fSCLK = 5 MHz)

Limp Home mode available

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