TYPICAL CHARACTERISTICS cont’

 

 

Vout Vs. Iout

6

 

5

 

 

 

Vout=5V

 

 

100%

 

90%

 

 

 

Vout=5V

Eff. Vs. Iout

 

4

 

3

 

2

 

1

Vin=0.8V

Vin=1V

Vin=2V

Vin=3V

Vin=4V

Vin=4.5V

0

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1

Iout (A)

 

80%

 

70%

 

60%

 

50%

 

40%

 

30%

 

 

 

 

 

 

 

Vin=0.8V

Vin=1V

Vin=2V

Vin=3V

Vin=4V

Vin=4.5V

0.001

0.01

0.1

1

10

100

1000

Iout (mA)

 

 

 

 

6

Iout = 1mA

5

UVLO

I_noload Vs Vin

14

 

12

 

 

 

Iout=0A

 

4

 

3

 

2

2.8V Rising

2.8V Falling

3.3V Rising

3.3V Falling

1

3.6V Rising

3.6V Falling

5V Rising

5V Falling

0

0

0.5

1

1.5

2

2.5

Vin (V)

 

10

 

8

3.3V OUT

6

5.0V OUT

 

4

 

2

 

0

0

0.5

1

1.5

2

2.5

3

3.5

4

4.5

5

Vin (V)

 

 

 

APPLICATION INFORMATION

 

 

Loop Operation

 

Main MOSFET and 160mΩ synchronous MOSFET. It uses a PWM current-mode control scheme. An error amplifier integrates error between

the FB signal and the internal reference voltage. The output of the integrator is then compared to the sum of a current-sense signal and the

slope compensation ramp. This operation generates a PWM signal that modulates the duty cycle of the power MOSFETs to achieve regulation

for output voltage.

 

The peak current of the NMOS switch is also sensed to limit the maximum current flowing through the switch and the inductor. The typical

peak current limit is set to 1A. An internal temperature sensor prevents the device from getting overheated in case of excessive power

dissipation.

 

Ultra low current consumption at Light Load Operation

HM6311