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ICS853031 데이터시트(PDF) 12 Page - Integrated Circuit Systems |
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ICS853031 데이터시트(HTML) 12 Page - Integrated Circuit Systems |
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12 / 19 page ![]() 853031AY www.icst.com/products/hiperclocks.html REV. B SEPTEMBER 16, 2004 12 Integrated Circuit Systems, Inc. ICS853031 LOW SKEW, 1-TO-9 DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER LVPECL CLOCK INPUT INTERFACE The PCLK /nPCLK accepts LVPECL, CML, SSTL and other differential signals. Both V SWING and VOH must meet the VPP and V CMR input requirements. Figures 6A to 6E show interface ex- amples for the HiPerClockS PCLK/nPCLK input driven by the most common driver types. The input interfaces suggested here are examples only. If the driver is from another vendor, use their termination recommendation. Please consult with the vendor of the driver component to confirm the driver termina- tion requirements. FIGURE 6A. HIPERCLOCKS PCLK/NPCLK INPUT DRIVEN BY A CML DRIVER FIGURE 6B. HIPERCLOCKS PCLK/NPCLK INPUT DRIVEN BY AN SSTL DRIVER FIGURE 6C. HIPERCLOCKS PCLK/NPCLK INPUT DRIVEN BY A 3.3V LVPECL DRIVER FIGURE 6D. HIPERCLOCKS PCLK/NPCLK INPUT DRIVEN BY A 3.3V LVDS DRIVER HiPerClockS PCLK nPCLK PCLK/nPCLK 3.3V R2 50 R1 50 3.3V Zo = 50 Ohm CML 3.3V Zo = 50 Ohm PCLK/nPCLK 2.5V Zo = 60 Ohm SSTL HiPerClockS PCLK nPCLK R2 120 3.3V R3 120 Zo = 60 Ohm R1 120 R4 120 2.5V Zo = 50 Ohm Input HiPerClockS CLK nCLK 3.3V R3 125 R2 84 Zo = 50 Ohm 3.3V R4 125 LVPECL R1 84 3.3V FIGURE 6E. HIPERCLOCKS PCLK/NPCLK INPUT DRIVEN BY A 3.3V LVPECL DRIVER WITH AC COUPLE 3.3V R5 100 - 200 3.3V 3.3V HiPerClockS PCLK nPCLK R1 125 PCLK/nPCLK R2 125 R3 84 C1 C2 Zo = 50 Ohm R4 84 Zo = 50 Ohm R6 100 - 200 3.3V LVPECL C2 R2 1K R5 100 Zo = 50 Ohm 3.3V 3.3V C1 R3 1K LVDS R4 1K HiPerClockS PCLK nPCLK R1 1K Zo = 50 Ohm 3.3V PC L K /n PC LK |
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