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PL2303 데이터시트(PDF) 13 Page - Prolific Technology Inc.

부품명 PL2303
상세설명  USB to Serial Bridge Controller
PDF  30 Pages
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제조업체  PROLIFIC [Prolific Technology Inc.]
홈페이지  http://www.prolific.com.tw
Logo PROLIFIC - Prolific Technology Inc.

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Revised Date:
March 20, 2012
ds_pl2303HXD_v1.4.4
PL-2303HX (Rev D) Product Datasheet
- 13 -
Document Version 1.4.4
5.0 Pin Assignment & Description
Pin Type Abbreviation:
I: Input
O: Output
B: Bidirectional I/O
P: Power/Ground
5.1
SSOP28 Package
Table 5-1 Pin Assignment & Description (SSOP28)
Pin # Name
Type
Description
1
TXD
O
(1)
Serial Port (Transmitted Data)
2
DTR_N
O
(1)
Serial Port (Data Terminal Ready)
3
RTS_N
O
(1)
Serial Port (Request To Send)
4
VDD_325
P
RS232 VDD. The power pin for the serial port signals. When
the serial port is 3.3V, this should be 3.3V. When the serial port
is 2.5V, this should be 2.5V. The range can be from 1.8V~3.3V.
5
RXD
I
(2)
Serial Port (Received Data)
6
RI_N
B
(2)
Serial Port (Ring Indicator); or Auxiliary General Purpose I/O
Port when enabled
(7).
7
GND
P
Ground
8
NC
-
No Connection
9
DSR_N
B
(2)
Serial Port (Data Set Ready); or Auxiliary General Purpose I/O
Port when enabled
(7).
10
DCD_N
B
(2)
Serial Port (Data Carrier Detect); or Auxiliary General Purpose
I/O Port when enabled
(7).
11
CTS_N
B
(2)
Serial Port (Clear to Send); or Auxiliary General Purpose I/O
Port when enabled
(7).
12
SHTD_N
O
(3)
RS232 Transceiver Shut Down Control
13
GP3
I/O
Auxiliary GPIO Pin 3 (Default output high mode)
(6)
14
GP2
I/O
Auxiliary GPIO Pin 2 (Default output high mode)
(6)
15
DP
B
USB Port D+ signal
16
DM
B
USB Port D- signal
17
VO_33
P
Regulator Power Output, 3.3V
18
GND
P
Ground
19
RESET_N
I
(4)
External System Reset (Active Low)
20
VDD_5
P
USB Port VBUS, 5V Power. (6.5V for OTPROM writing voltage).
21
NC
-
No Connection
22
GP0
B
(5)
General Purpose I/O Pin 0
23
GP1
B
(5)
General Purpose I/O Pin 1
24
NC
-
No Connection
25
GND
-
Ground
26
TEST
I
Test mode control
27
NC
-
No Connection
28
Reserved
-
Reserved pin (Must be floating)
Notes:
(1)
– Tri-State, Output Pad. Level and Driving Capability decided by VDD_325.
(2)
– Tri-State, CMOS Input/Output Pad with level shifter. Level and Driving Capability decided by VDD_325.
(3)
– CMOS Output Pad.
(4)
– CMOS Input Pad, 5V tolerant.
(5)
– Tri-State, CMOS Input/Output Pad. (Default mode: Input)
(6)
– Default output high mode; do not connect to ground.
(7)
– Enabling Auxiliary GPIO requires special customized driver.



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