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DS00001898A-page 23

USB3280

7.8.2

POWER ON RESET (POR)

The USB3280 provides an internal POR circuit that generates a reset pulse once the PHY supplies are stable.

7.8.3

RESET PIN

The UTMI+ Digital can be reset at any time with the RESET pin. The RESET pin of the USB3280 may be asynchro-

nously asserted and de-asserted so long as it is held in the asserted state continuously for a duration greater than one

CLKOUT cycle. The RESET input may be asserted when the USB3280 CLKOUT signal is not active (i.e. in the suspend

state caused by asserting the SUSPENDN input) but reset must only be de-asserted when the USB3280 CLKOUT sig-

nal is active and the RESET has been held asserted for a duration greater than one CKOUT clock cycle. No other PHY

digital input signals may change state for two CLKOUT clock cycles after the de-assertion of the reset signal.