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XRT79L71 데이터시트(PDF) 73 Page - Exar Corporation |
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XRT79L71 데이터시트(HTML) 73 Page - Exar Corporation |
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73 / 441 page ![]() áç áç áç áç PRELIMINARY XRT79L71 1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC REV. P1.0.3 61 RECEIVE UTOPIA INTERFACE RECEIVE UTOPIA INTERFACE The purpose of the Receive UTOPIA Interface block is to function as either a Standard UTOPIA Level 1, 2 or 3 Interface as it outputs ATM cell data to either an ATM Layer or ATM Adaptation Layer Processor. FIGURE 23. TIMING DIAGRAM FOR THE RECEIVE UTOPIA INTERFACE BLOCK TABLE 14: TIMING INFORMATION FOR THE RECEIVE UTOPIA INTERFACE BLOCK Symbol PARAMETER MIN.TYP MAX.UNITS Receive UTOPIA Interface Block (See Figure 22) t53 Delay time from rising edge of RxUClk to Data Valid at RxU- Data[15:0] 2.7 12 ns t54 Rx UTOPIA Read Enable setup time to rising edge of RxUClk 4 ns t55 Delay time from rising edge of RxUClk to valid RxUPrty bit 2.9 9.8 ns t56 Delay time from rising edge of RxUClk to valid RxUSoC bit 3.5 9.7 ns t57 Delay time from Read Enable false to Data Bus being tri-stated 1 11.5 16 ns t58 Delay time from Read Enable false to RxUPrty bit being tri- stated 112 16 ns RxUData[15:0] RxUEn* RxUPrty RxUSoC RxUClk t54 t57 RxUClav t62 t63 t53 DATA VALID t55 t58 t59 t56 |
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