AS7C251MPFD18A datasheet(9/19 Pages) ALSC

9 / 19 page

2/10/05, v. 1.2

Alliance Semiconductor

9 of 19

AS7C251MPFD18A

DC electrical characteristics

† LBO and ZZ pins have an internal pull-up or pull-down, and input leakage = ±10

µA.

*VIH max < VDD +1.5V for pulse width less than 0.2 X tCYC

**VIL min = -1.5 for pulse width less than 0.2 X tCYC

IDD operating conditions and maximum limits

Parameter

Sym

Conditions

Min

Max

Unit

Input leakage current†

|ILI|VDD = Max, 0V < VIN < VDD

-2

µA

Output leakage current

|ILO|OE ≥ VIH, VDD = Max, 0V < VOUT < VDDQ

-2

µA

Input high (logic 1) voltage

VIH

Address and control pins

1.7*

VDD+0.3

I/O pins

1.7*

VDDQ+0.3

Input low (logic 0) voltage

VIL

Address and control pins

-0.3**

0.7

I/O pins

-0.3**

0.7

Output high voltage

VOH

IOH = –4 mA, VDDQ = 2.375V

1.7

–

Output low voltage

VOL

IOL = 8 mA, VDDQ = 2.625V

–

0.7

Parameter

Sym

Conditions

-166

-133

Unit

Operating power supply current1

1 ICC given with no output loading. ICC increases with faster cycle times and greater output loading.

ICC

CE0 < VIL, CE1 > VIH, CE2 < VIL, f = fMax,

IOUT = 0 mA, ZZ < VIL

290

270

Standby power supply current

ISB

All VIN ≤ 0.2V or > VDD – 0.2V, Deselected,

f = fMax, ZZ < VIL

ISB1

Deselected, f = 0, ZZ

< 0.2V,

all VIN ≤ 0.2V or ≥ VDD – 0.2V

ISB2

Deselected, f = fMax, ZZ ≥ VDD – 0.2V,

all VIN ≤ VIL or ≥ VIH

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