Preliminary Datasheet

LP6239

Email: marketing@lowpowersemi.com www.lowpowersemi.com

Page 3 of 6

LP6239 Version 0.1 JUL-2019

Function Block Diagram

CS

Internal

Regulator

UVLO

GATE

Gate

Driver

Control

Logic

OSC

OTP

OCP

UVP

EN

EN

COMP

FB

EA and

Comp.

VIN

GND

Figure 3. Function Block Diagram

Functional Pin Description

Pin NO.

Pin Name

Description

1

VIN

Input Supply Pin. Decouple with 10

μF ceramic capacitor close to the pin.

2

GATE

External NMOS Gate Drive Pin.

3

GND

Ground.

4

CS

Current Sense Input Pin.

5

FB

Regulator Feedback Input. Connect to an external resistive to set the output current.

6

COMP

Regulator Error Amplifier Compensation Pin.

7

NC

No Connection.

8

EN

Chip Enable Control.