| 전자부품 데이터시트 검색엔진 |
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WM8960CGEFL/V 데이터시트(PDF) 46 Page - Cirrus Logic |
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WM8960CGEFL/V 데이터시트(HTML) 46 Page - Cirrus Logic |
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46 / 94 page ![]() WM8960 46 Rev 4.4 In order to prevent this click noise, a zero cross function is provided. When enabled, this will cause the PGA volume to update only when a zero crossing occurs, minimising click noise as shown in Figure 18. Write Left Volume Update bit = 0 Write Right Volume Update bit = 1 Left PGA Input Right PGA Input Control Interface Time Left PGA Output Right PGA Output Write Right PGA Volume with update Write Left PGA Volume without update 0dB Gain 6dB Gain Zero crossings cause volume updates Figure 18 Volume Update using Zero Cross Detection If there is a long period where no zero-crossing occurs, a timeout circuit in the WM8960 will automatically update the volume. The volume updates will occur between one and two timeout periods, depending on when the volume update bit is set as shown in Figure 19. The TOEN register bit must be set to enable this timeout function. The timeout period is set by TOCLKSEL. Write Left Volume Update bit = 0 Write Right Volume Update bit = 1 Left PGA Input Right PGA Input Control Interface Time Left PGA Output Right PGA Output Write Right PGA Volume with update Write Left PGA Volume without update Timeout Counter Timeout causes volume update Zero crossing causes volume update No zero crossing SYSCLK/221 or SYSCLK/219, depending on TOCLKSEL Figure 19 Volume Update after Timeout |
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