SN74HCS596 8-Bit Shift Register With Schmitt-Trigger Inputs and Open-Drain Output

Registers

1 Features

• Wide operating voltage range: 2 V to 6 V

• Schmitt-trigger inputs allow for slow or noisy input

signals

• Low power consumption

– Typical input leakage current of ±100 nA

• ±7.8-mA output drive at 6 V

• Extended ambient temperature range: –40°C to

2 Applications

• Output expansion

• LED matrix control

• 7-segment display control

• 8-bit data storage

3 Description

The SN74HCS596 device contains an 8-bit, serial-in,

parallel-out shift register that feeds an 8-bit D-type

storage register. All inputs include Schmitt-triggers,

eliminating any erroneous data outputs due to slow-

edged or noisy input signals. The storage register has

parallel open-drain outputs. Separate clocks are

provided for both the shift and storage register. The

shift register has a direct overriding clear (SRCLR)

cascading. When the output-enable (OE) input is high,

the outputs are in a highimpedance state. Internal

register data is not impacted by the operation of the

OE input.

Device Information

PART NUMBER

PACKAGE(1)

BODY SIZE (NOM)

SN74HCS596PW

TSSOP (16)

5.00 mm x 4.40 mm

SN74HCS596D

SOIC (16)

9.90 mm x 3.90 mm

(1)

For all available packages, see the orderable addendum at

the end of the data sheet.

Input Voltage

Schmitt-trigger

CMOS Input

Response

Waveforms

Standard

CMOS Input

Response

Waveforms

Input Voltage

Input Voltage

Time

Time

Input Voltage

Waveforms

Low Power

Noise Rejection

Supports Slow Inputs

Time

Time

Time

Time

Benefits of Schmitt-trigger inputs

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SN74HCS596

SCLS840 – AUGUST 2020

Copyright © 2020 Texas Instruments Incorporated

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SN74HCS596

SCLS840 – AUGUST 2020

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.