| 전자부품 데이터시트 검색엔진 |
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AS7C34096A 데이터시트(PDF) 5 Page - Alliance Semiconductor Corporation |
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AS7C34096A 데이터시트(HTML) 5 Page - Alliance Semiconductor Corporation |
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5 / 9 page ![]() ® AS7C34096A 8/17/04, v. 2.1 Alliance Semiconductor P. 5 of 9 Write waveform 1 (WE controlled)10 Write cycle (over the operating range)10 Parameter Symbol –10 –12 –15 –20 Unit Notes Min Max Min Max Min Max Min Max Write cycle time tWC 10–12– 15–20– ns Chip enable (CE) to write end tCW 7 – 8 – 10–12– ns Address setup to write end tAW 7 – 8 – 10–12– ns Address setup time tAS 0–0 –0– 0– ns Write pulse width (OE = high) tWP1 7 – 8 – 10–12– ns Write pulse width (OE = low tWP2 10–12– 15–20– ns Address hold from end of write tAH 0–0 –0– 0– ns Write recovery time tWR 0–0 –0– 0– ns Data valid to write end tDW 5–6 –7– 9– ns Data hold time tDH 0–0 –0– 0– ns 4, 5 Write enable to output in high Z tWZ 050 607 09 ns 4, 5 Output active from write end tOW 3–3 –3– 3– ns 4, 5 tAW tAH tWC Address WE DOUT tDH tOW tDW tWZ tWP tAS Data valid DIN tWR |
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