전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

ASM5P2308A 데이터시트(PDF) 3 Page - Alliance Semiconductor Corporation

부품명 ASM5P2308A
상세설명  3.3V Zero-Delay Buffer
PDF  18 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  ALSC [Alliance Semiconductor Corporation]
홈페이지  https://www.alliancememory.com
Logo ALSC - Alliance Semiconductor Corporation

ASM5P2308A 데이터시트(HTML) 3 Page - Alliance Semiconductor Corporation

  ASM5P2308A Datasheet HTML 1Page - Alliance Semiconductor Corporation ASM5P2308A Datasheet HTML 2Page - Alliance Semiconductor Corporation ASM5P2308A Datasheet HTML 3Page - Alliance Semiconductor Corporation ASM5P2308A Datasheet HTML 4Page - Alliance Semiconductor Corporation ASM5P2308A Datasheet HTML 5Page - Alliance Semiconductor Corporation ASM5P2308A Datasheet HTML 6Page - Alliance Semiconductor Corporation ASM5P2308A Datasheet HTML 7Page - Alliance Semiconductor Corporation ASM5P2308A Datasheet HTML 8Page - Alliance Semiconductor Corporation ASM5P2308A Datasheet HTML 9Page - Alliance Semiconductor Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 3 / 18 page
background image
September 2005
ASM5P2308A
rev 1.4
3.3V Zero Delay Buffer
3 of 18
Notice: The information in this document is subject to change without notice.
Zero Delay and Skew Control
All outputs should be uniformly loaded to achieve Zero Delay between input and output.
To close the feedback loop of the ASM5P2308A, the FBK pin can be driven from any of the eight available output pins. The
output driving the FBK pin will be driving a total load of 7pF plus any additional load that it drives. The relative loading of this
output (with respect to the remaining outputs) can adjust the input output delay. This is shown in the above graph.
For applications requiring zero input-output delay, all outputs including the one providing feedback should be equally loaded.
If input-output delay adjustments are required, use the above graph to calculate loading differences between the feedback
output and remaining outputs. For zero output-output skew, be sure to load outputs equally.
-30
-25
-20
-15
-10
-5
0
5
10
15
20
25
30
0
-500
-1000
-1500
500
1000
1500
Output Load Difference: FBK Load - CLKA/CLKB Load (pF)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com