MSP430F6433IPZ datasheet(6/128 Pages) TI

6 / 128 page

• Changed the value of DAC12_xDAT from 7F7h to F7Fh and changed the x-axis label from fToggle to 1/fToggle in

Figure 8-22, Crosstalk Test Conditions ............................................................................................................52

• Corrected the spelling of the MRG bits in the fMCLK,MRG parameter in Section 8.54, Flash Memory .............. 56

• Removed RTC_B from LPM4.5 wake-up options.............................................................................................59

• Throughout document, changed all instances of "bootstrap loader" to "bootloader" .......................................61

• Added the paragraph that starts "Using the MSP430 RTC_B Module With Battery Backup Supply describes

how..." .............................................................................................................................................................. 66

• Corrected names of interrupt events PMMSWBOR (BOR) and PMMSWPOR (POR) in Table 9-10, System

Module Interrupt Vector Registers ................................................................................................................... 67

• Corrected spelling of NMIIFG (added missing "I") in Table 9-10, System Module Interrupt Vector Registers ....

• Added connection from "LCDS40...LCDS42" to AND gate in Figure 9-7, Port P5 (P5.2 to P5.7) Diagram .... 95

• Added P7SEL.2 and XT2BYPASS inputs with AND and OR gates in Figure 9-10, Port P7 (P7.3) Diagram .. 99

• Changed P7SEL.3 column from X to 0 for "P7.3 (I/O)" rows............................................................................99

• Changed Table 9-61, Port PU.0, PU.1 Functions .......................................................................................... 106

• Added Section 10 and moved Development Tools Support, Device and Development Tool Nomenclature,

Trademarks, and Electrostatic Discharge Caution sections to it..................................................................... 110

• Added Section 11, Mechanical, Packaging, and Orderable Information ........................................................ 117

The following table lists the changes to this data sheet from the original release through revision C.

REVISION

COMMENTS

SLAS720C

August 2013

Section 7.2, Added note regarding pullup resistor to RST/NMI/SBWTDIO pin.

Added Applications, Development Tools Support, and Device and Development Tool Nomenclature

Section 9.12.1, Changed the description of the number of I/Os in each port.

Table 9-18, Added PM5CTL0 register.

Section 8.45, Fixed typo in IDD Test Conditions (changed from DAC12IOG to DAC12OG).

Section 8.54, Changed IERASE and IMERASE, IBANK limits.

SLAS720B

August 2012

Changed ACLK description in Section 7.2.

Changed typos to Interrupt Flag names on Timer TA2 rows in Table 9-3.

Changed notes on Section 8.44.

Changed SYSRSTIV, System Reset offset 1Ch to Reserved in Table 9-10.

Corrected names of SVMLVLRIFG and SVMHVLRIFG bits in Table 9-10.

Changed tSENSOR(sample) MIN to 100 µs in Section 8.42.

Changed note (2) in Section 8.42.

Editorial changes throughout.

SLAS720A

September 2011

Production Data release

SLAS720

August 2010

Product Preview release

MSP430F6438, MSP430F6436, MSP430F6435, MSP430F6433

SLAS720F – AUGUST 2010 – REVISED SEPTEMBER 2020

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