5 Pin Configuration and Functions

1

2

3

7

4

5

6

14

13

12

8

11

10

9

GND

SER

RCLK

SRCLK

V

CC

15

16

Q

B

Q

C

Q

D

Q

E

Q

F

Q

G

Q

H

Q

A

OE

SRCLR

Q

H¶

D or PW Package 16-Pin SOIC or TSSOP Top View

GND

SER

OE

RCLK

SRCLK

SRCLR

PAD

2

3

4

5

6

7

8

15

14

13

12

11

10

9

1

16

BQB Package 16-Pin WQFN Transparent Top View

Pin Functions

PIN

TYPE

DESCRIPTION

NAME

NO.

1

Output

2

Output

3

Output

4

Output

5

Output

6

Output

7

Output

GND

8

—

Ground

9

Output

Serial output, can be used for cascading

SRCLR

10

Input

Shift register clear, active low

SRCLK

11

Input

Shift register clock, rising edge triggered

RCLK

12

Input

Output register clock, rising edge triggered

OE

13

Input

Output Enable, active low

SER

14

Input

Serial input

15

Output

16

—

Positive supply

Thermal Pad (1)

—

The thermal pad can be connect to GND or left floating. Do not connect to any other signal

or supply.

1. BQ package only.

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SN74HCS595-Q1

SCLS785B – DECEMBER 2019 – REVISED AUGUST 2020

Copyright © 2020 Texas Instruments Incorporated

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