Figure 3-3. LVP Entry (Powering Up)

32 Clocks

31

30

29

...

1

MSb of Pattern

MCLR

ICSPDAT

ICSPCLK

LSb of Pattern

Figure 3-4. LVP Entry (Powered)

32 Clocks

31

30

29

...

1

MSb of Pattern

LSb of Pattern

MCLR

ICSPCLK

ICSPDAT

Important: 

To enter LVP mode, the MSb of the Most Significant nibble must be shifted in first. This differs from

entering the key sequence on some other device families.

3.1.3

Program/Verify Commands

Once a device has entered ICSP Program/Verify mode (using either high-voltage or LVP entry), the programming

host device may issue six commands to the microcontroller, each eight bits in length. The commands are

summarized in Table 3-1. The commands are used to erase or program the device based on the location of the

Program Counter (PC).

Some of the 8-bit commands also have an associated data payload (such as Load PC Address and Read Data from

NVM).

If the host device issues an 8-bit command byte that has an associated data payload, the host device is responsible

for sending an additional 24 clock pulses (for example, three 8-bit bytes) in order to send or receive the payload data

associated with the command.

The payload field size is used so as to be compatible with many 8-bit SPI-based systems. Within each 24-bit payload

field, the first bit transmitted is always a Start bit, followed by a variable number of Pad bits, followed by the useful

data payload bits and ending with one Stop bit. The useful data payload bits are always transmitted, Most Significant

bit (MSb) first.

PIC18FXXQ41

Programming Algorithms

Programming Specification

DS40002143B-page 13