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TMP64 데이터시트(PDF) 5 Page - Texas Instruments

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부품명 TMP64
상세설명  TMP64 짹1% 47-k廓 Linear Thermistor With 0402 Package
PDF  28 Pages
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제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI - Texas Instruments

TMP64 데이터시트(HTML) 5 Page - Texas Instruments

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TMP64
www.ti.com
SNIS212B – DECEMBER 2019 – REVISED JUNE 2020
Product Folder Links: TMP64
Submit Documentation Feedback
Copyright © 2019–2020, Texas Instruments Incorporated
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or anyother conditions beyond those indicated under Recommended
OperatingConditions. Exposure to absolute-maximum-rated conditions for extended periods mayaffect device reliability.
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
MAX
UNIT
Voltage across pins 2 (+) and 1 (–)
+6
V
Current through the device
+450
µA
Junction temperature (TJ)
–65
+150
°C
Storage temperature (Tstg)
–65
+150
°C
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.2 ESD Ratings
VALUE
UNIT
V(ESD)
Electrostatic discharge
Human-body model (HBM) per JESD22-A114 (1)
±2000
V
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±1000
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VSns
Voltage across pins 2 (+) and 1 (–)
0
5.5
V
ISns
Current passing through the device
0
100
µA
TA
Operating free-air temperature (specified performance) (X1SON/DEC Package)
–40
125
°C
(1)
The junction to ambient thermal resistance (RθJA ) under natural convection is obtained in a simulation on a JEDEC-standard, High-K
board as specified in JESD51-7, in an environment described in JESD51-2. Exposed pad packages assume that thermal vias are
included in the PCB, per JESD 51-5.
(2)
Changes in output due to self heating can be computed by multiplying the internal dissipation by the thermal resistance.
7.4 Thermal Information
THERMAL METRIC
TMP64
Units
DEC (X1SON)
DYA (SOT-5X3)
2 PINS
2 PINS
RθJA
Junction-to-ambient thermal resistance(1)(2)
443.4
742.9
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
195.7
315.8
°C/W
RθJB
Junction-to-board thermal resistance
254.6
506.2
°C/W
ΨJT
Junction-to-top characterization parameter
19.9
109.3
°C/W
ΨJB
Junction-to-board characterization parameter
254.5
500.4
°C/W
RθJC(bot)
Junction-to-case (bot) thermal resistance
–
–
°C/W



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