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USB334X 데이터시트(PDF) 65 Page - Microchip Technology |
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USB334X 데이터시트(HTML) 65 Page - Microchip Technology |
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65 / 92 page ![]() 2009-2018 Microchip Technology Inc. DS00002646A-page 65 USB334x 7.1.1.5 Function Control Address = 04-06h (read), 04h (write), 05h (set), 06h (clear) 7.1.1.6 Interface Control Address = 07-09h (read), 07h (write), 08h (set), 09h (clear) Field Name Bit Access Default Description XcvrSelect[1:0] 1:0 rd/w/s/c 01b Selects the required transceiver speed. 00b: Enables HS transceiver 01b: Enables FS transceiver 10b: Enables LS transceiver 11b: Enables FS transceiver for LS packets (FS preamble automatically pre-pended) TermSelect 2 rd/w/s/c 0b Controls the DP and DM termination depending on XcvrSelect, OpMode, DpPulldown, and DmPulldown. The DP and DM termination is detailed in Table 5-1. OpMode 4:3 rd/w/s/c 00b Selects the required bit encoding style during transmit. 00b: Normal Operation 01b: Non-Driving 10b: Disable bit-stuff and NRZI encoding 11b: Reserved Reset 5 rd/w/s/c 0b Active high transceiver reset. This reset does not reset the ULPI interface or register set. Automatically clears after reset is complete. SuspendM 6 rd/w/s/c 1b Active low PHY suspend. When cleared the PHY will enter Low Power Mode as detailed in Section 6.5, "Low Power Mode," on page 55. Automatically set when exiting Low Power Mode. LPM Enable 7 rd/w/s/c 0b When enabled the PLL start-up time is shortened to allow fast start-up for LPM. The reduced PLL start-up time is achieved by bypassing the VCO process compensation which was done on initial start-up. Field Name Bit Access Default Description 6-pin FsLsSerialMode 0 rd/w/s/c 0b When asserted the ULPI interface is redefined to the 6-pin Serial Mode. The PHY will automatically clear this bit when exiting serial mode. 3-pin FsLsSerialMode 1 rd/w/s/c 0b When asserted the ULPI interface is redefined to the 3-pin Serial Mode. The PHY will automatically clear this bit when exiting serial mode. CarkitMode 2 rd/w/s/c 0b When asserted the ULPI interface is redefined to the Carkit interface. The PHY will automatically clear this bit when exiting Carkit Mode. |
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