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mdb392

GREY LEVEL

GENERATOR

COM

DRIVER

GATE

DRIVER

DACs

SOURCE DRIVER

DATA LATCH/FIFO

TIMING

CONTROLLER

OSCILLATOR

DISPLAY DATA RAM

132

× 132 × 16-bit

REFERENCE

VOLTAGE

REFERENCE

CURRENT

RAM ACCESS

ARBITER

CALIBRATION

MEMORY

DC-TO-DC

CONVERTER

USER INTERFACE

TEMPERATURE

COMPENSATION

COMMAND

INTERPRETER

TEST

INDUCTIVE

DC-TO-DC

to all blocks

PCF8881

SM1P

SM2P

SM1N

SM2N

D[0]/SDA

VDDD[MODE]

VSSD[MODE]

SCAN_MODE[1:0]

FRM_MODE

T[6:1]

D[15:1]

RD_N

WR_N

DCX/SCL

CS_N

RES_N

TE

ISEL[2:0]

VGL_OUT

VSP_OUT

VSP_IN

VSN_OUT

VSN_IN

VGH_OUT

VGH_IN

VGL_IN

SWCTRLP

SWCTRLN

C1P to C9P

C1M to C9M

VGM16P to VGM1P

VGM16N to VGM1N

S395 to S0

IREF

VBG

VCOM

OSC

G131 to G0

Fig.2 Block diagram.