W3150A datasheet(4/69 Pages) WIZNET

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W3150A+ Datasheet

Description

The W3150A+ is an LSI of hardware protocol stack that provides an easy, low-cost solution for high-speed

Internet connectivity for digital devices by allowing simple installation of TCP/IP stack in the hardware.

The W3150A+ offers a quick and easy way to add Ethernet networking functionality to any products.

Implementing this LSI into a system can completely provide Internet connectivity and process standard

protocols by significantly reducing the software development cost as well development time which is most

important in today time-to market.

The W3150A+ contains TCP/IP Protocol Stacks such as TCP, UDP, ICMP, IPv4, ARP and PPPoE protocols, as

well as Ethernet protocols such as MAC protocol. The total internal memory size is 16Kbytes, which is used

as the buffer for data transmission and receipt.

The W3150A+ provides three different interfaces like direct, indirect bus interfaces and SPI(Serial

Peripheral Interface) to connect with MCUs and standard MII(Media Independent Interface) composed of

nibble data bus to connect with Ethernet PHY devices.

The W3150A+ is a best-fitted device for embedded application including IP-Settop Box, Internet-DVR,

Internet phones, VoIP SOC chips, Internet MP3 players, handheld medical devices, various industrial system

for monitoring and metering, and any other non-portable electronic devices such as large consumer

electronic products.

Features

◼

Support Hardwired TCP/IP Protocols : TCP, UDP, ICMP, IGMP, IPv4, ARP, PPPoE, Ethernet

◼

Support ADSL connection (with support PPPoE Protocol with PAP/CHAP Authentication mode)

◼

Supports 4 independent sockets simultaneously

◼

Not support IP Fragmentation

◼

Standard MII Interface for Ethernet-PHY chip

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Supports 10BaseT/100BaseTX

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Supports full-duplex mode

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Internal 16Kbytes Memory for Tx/Rx Buffers

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0.18 µm CMOS technology

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3.3V operation with 5V I/O signal tolerance

◼

Small 64 Pin LQFP Package

◼

Lead-Free Package

◼

Support Serial Peripheral Interface(SPI MODE 0)

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