WIZ610io User Manual (WIZnet Co.,Ltd.)

8

In the VDM, CSn(High-to-Low) by HOST informs the start of SPI frame and CSn(Low to High) by

HOST informs the end of SPI frame to W6100.

In the control phase, RW is "0" to indicate read access and OP[1:0] is "00" to indicate VDM.

The data bits received through MISO are synchronized to SCLK (Falling-Edge).

If more than one byte of data is transmitted continuously, it supports sequential data write.

< Read Sequence >

// Address

tAD[0] = (uint8_t)((AddrSel & 0x00FF0000) >> 16);

tAD[1] = (uint8_t)((AddrSel & 0x0000FF00) >> 8);

tAD[2] = (uint8_t)(AddrSel & 0x000000ff);

for(idx = 0; idx < len; idx++)

// Write data in loop

{

buf[idx] = IINCHIP_SpiSendData(0x00);

}