 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
FS32K112BHTXWLLTR 데이터시트(PDF) 69 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
FS32K112BHTXWLLTR 데이터시트(HTML) 69 Page - NXP Semiconductors |
|
|
69 / 100 page  Table 46. LPSPI electrical specifications1 (continued) Descripti on Conditions Run Mode2 HSRUN Mode2 VLPR Mode (S32K1xx) VLPR Mode (S32K14xW) Un it 5.0 V IO 3.3 V IO 5.0 V IO 3.3 V IO 5.0 V IO 3.3 V IO 5.0 V IO 3.3 V IO Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max Master Loopback5 -10 - -14 - -10 - -14 - -14 - -19 - -19 - -19 - Master Loopback(sl ow)6 -15 - -22 - -15 - -22 - -21 - -27 - -30 - -30 - 12 tRI/FI Rise/Fall time input Slave - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 ns Master - - - - - - - - Master Loopback5 - - - - - - - - Master Loopback(sl ow)6 - - - - - - - - 13 tRO/FO Rise/Fall time output Slave - 25 - 25 - 25 - 25 - 25 - 25 - 25 - 25 ns Master - - - - - - - - Master Loopback 5 - - - - - - - - Master Loopback(sl ow) 6 - - - - - - - - 1. Trace length should not exceed 11 inches for SCK pad when used in Master loopback mode. 2. While transitioning from HSRUN mode to RUN mode, LPSPI output clock should not be more than 14 MHz. 3. fperiph = LPSPI peripheral clock 4. tperiph = 1/fperiph 5. Master Loopback mode - In this mode LPSPI_SCK clock is delayed for sampling the input data which is enabled by setting LPSPI_CFGR1[SAMPLE] bit as 1. Clock pads used are PTD15 and PTE0. Applicable only for LPSPI0. 6. Master Loopback (slow) - In this mode LPSPI_SCK clock is delayed for sampling the input data which is enabled by setting LPSPI_CFGR1[SAMPLE] bit as 1. Clock pad used is PTB2. Applicable only for LPSPI0. 7. This is the maximum operating frequency (fop) for LPSPI0 with GPIO-HD PAD type only. Otherwise, the maximum operating frequency (fop) is 12 Mhz. 8. Set the PCSSCK configuration bit as 0, for a minimum of 1 delay cycle of LPSPI baud rate clock, where PCSSCK ranges from 0 to 255. 9. Set the SCKPCS configuration bit as 0, for a minimum of 1 delay cycle of LPSPI baud rate clock, where SCKPCS ranges from 0 to 255. 10. While selecting odd dividers, ensure Duty Cycle is meeting this parameter. 11. Maximum operating frequency (fop ) is 12 MHz irrespective of PAD type and LPSPI instance. 12. Applicable for LPSPI0 only with GPIO-HD PAD type, with maximum operating frequency (fop) as 14 MHz. |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
