MAS3506D datasheet(43/52 Pages) MICRONAS

43 / 52 page

PRELIMINARY DATA SHEET

MAS 3506D

Micronas

4.6.3.4. I2S Characteristics – SDO

at T = TA, VSUP = 2.7 to 3.6 V, typ. values at TA =27°C, VSUP = 3.0 V, CLKF = 14.725 MHz, duty cycle = 50 %

Fig. 4–18: Serial output

4.6.3.5. Firmware Characteristics

at T = TA, VSUP = 2.7 to 3.6 V, typ. values at TA =27°C, VSUP = 3.0 V, CLKF = 14.725 MHz, duty cycle = 50 %

Symbol

Parameter

Pin Name

Min.

Typ.

Max.

Unit

Test Conditions

tSOCLK

I2S clock output period

SOC

325

48 kHz Stereo

32 bit/sample

tSOISS

I2S wordstrobe delay time

after falling edge of clock

SOC,

SOI

0ns

tSOODC

I2S data delay time after

falling edge of clock

SOC,

SOD

0ns

TSOCLK

TSOISS

TSOODC

SOC

SOI

SOD

Symbol

Parameter

Min.

Typ.

Max.

Unit

Test Conditions

Synchronization Times

tbcsync

Synchronization on Broadcast Channel

216

432

tmpgsync

Synchronization on MPEG bit streams

12..36

fs = 32 kHz, MPEG 2.5

Time constants

tbcloop

Buffer controlled loop time constant (see Fig. 2–

2 on page 8)

step response

tanc

Validity of ancillary data after rising edge of

MPEG-FRAME-SYNC signal

6ms

tSCH

Validity of SCH-data after rising edge of

BC-FRAME-SYNC signal

400

Ranges

PLLRange

Tracking range of sampling clock recovery PLL

−200

200

ppm

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