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PCK351DB 데이터시트(PDF) 3 Page - NXP Semiconductors |
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PCK351DB 데이터시트(HTML) 3 Page - NXP Semiconductors |
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3 / 17 page ![]() Philips Semiconductors PCK351 1:10 clock distribution device with 3-State outputs Product data Rev. 01 — 14 May 2002 3 of 17 9397 750 09791 © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 5. Pinning information 5.1 Pinning 5.2 Pin description Fig 1. SO24 pin configuration. Fig 2. SSOP24 pin configuration. 002aaa280 1 2 3 4 5 6 7 8 9 10 11 12 GND Y10 VCC Y9 OE A GND GND Y8 VCC Y7 GND GND Y1 VCC Y2 GND Y3 Y4 GND Y5 VCC Y6 GND 24 23 22 21 20 19 18 17 16 15 14 13 002aaa281 1 2 3 4 5 6 7 8 9 10 11 12 GND Y10 VCC Y9 OE A GND GND Y8 VCC Y7 GND GND Y1 VCC Y2 GND Y3 Y4 GND Y5 VCC Y6 GND 24 23 22 21 20 19 18 17 16 15 14 13 Table 3: Pin description Symbol Pin Description GND 1, 7, 8, 12, 13, 17, 20, 24 ground (0 V) Y10 to Y1 2, 4, 9, 11, 14, 16, 18, 19, 21, 23 outputs VCC 3, 10, 15, 22 supply voltage OE 5 output enable input (Active-LOW) A 6 data input |
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