Low-Power, Slew-Rate-Limited
RS-485/RS-422 Transceivers
______________________________________________________________Pin Description
HWD481
HWD483
HWD485
HWD487
HWD1487
TOP VIEW
NOTE: PIN LABELS Y AND Z ON TIMING, TEST, AND WAVEFORM DIAGRAMS REFER TO PINS A AND B WHEN DE IS HIGH.
TYPICAL OPERATING CIRCUIT SHOWN WITH DIP/SO PACKAGE.
1
2
3
4
8
5
VCC
GND
DI
DE
RE
RO
R
D
Rt
Rt
7
6
D
R
DE
RE
DI
RO
A
B
1
2
3
4
8
7
6
5
VCC
B
A
GND
DI
DE
RE
RO
DIP/SO
R
D
1
2
3
4
8
7
6
5
VCC
A
GND
DE
RE
B
RO
µMAX
B
A
DI
HWD481
HWD483
HWD485
HWD487
HWD1487
Figure 1. HWD481/HWD483/HWD485/HWD487/HWD1487 Pin Configuration and Typical Operating Circuit
µMAX
—
—
5
6
7
8
—
2
—
1
3
—
µMAX
4
5
6
7
—
—
8
—
1
—
2
—
DIP/SO
DIP/SO
2
3
Receiver Output Enable. RO is enabled when RE is low; RO is
high impedance when RE is high.
3
4
Driver Output Enable. The driver outputs, Y and Z, are enabled
by bringing DE high. They are high impedance when DE is low. If
the driver outputs are enabled, the parts function as line drivers.
While they are high impedance, they function as line receivers if
RE is low.
DIP/SO
—
4
5
Driver Input. A low on DI forces output Y low and output Z high.
Similarly, a high on DI forces output Y high and output Z low.
5
6, 7
Ground
—
9
Noninverting Driver Output
—
10
Inverting Driver Output
—
3
4
6
—
Noninverting Receiver Input and Noninverting Driver Output
—
12
Noninverting Receiver Input
5
6
—
8
RE
DE
DI
GND
Y
Z
A
A
7
—
—
B
Inverting Receiver Input and Inverting Driver Output
—
7
11
B
Inverting Receiver Input
8
1
14
VCC
Positive Supply: 4.75V ≤ VCC ≤ 5.25V
—
—
1, 8, 13
N.C.
No Connect—not internally connected
FUNCTION
NAME
4
3
1
2
Receiver Output: If A > B by 200mV, RO will be high;
If A < B by 200mV, RO will be low.
2
RO
PIN
FUNCTION
NAME
HWD481/HWD483/
HWD485/HWD487/
HWD1487
HWD488/
HWD490
HWD489/
HWD491
7
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