| 전자부품 데이터시트 검색엔진 |
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IN74ACT161 데이터시트(PDF) 5 Page - Integral Corp. |
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IN74ACT161 데이터시트(HTML) 5 Page - Integral Corp. |
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5 / 8 page ![]() IN74ACT161 5 TIMING REQUIREMENTS (VCC=5.0V±10%, CL=50pF,Input tr=tf=3.0 ns) Guaranteed Limit Symbol Parameter +25 ° C -40 ° C to +85 ° C Unit tSU Minimum Setup Time, Preset Data Inputs to Clock (Figure 4) 9.5 11.5 ns th Minimum Hold Time, Clock to Preset Data Inputs (Figure 4) 0 0 ns tSU Minimum Setup Time,Load to Clock (Figure 4) 8.5 9.5 ns th Minimum Hold Time, Clock to Load (Figure 4) -0.5 -0.5 ns tSU Minimum Setup Time, Enable T or Enable P to Clock (Figure 5) 5.5 6.5 ns th Minimum Hold Time, Clock to Enable T or Enable P (Figure 5) 0 0 ns tw Minimum Pulse Width, Clock (Load) (Figure 1) 3.0 3.5 ns tw Minimum Pulse Width, Clock (Count)(Figure 1) 3.0 3.5 ns tw Minimum Pulse Width, Reset (Figure 2) 3.0 7.5 ns trec Minimum Recovery Time, Reset to Clock (Figure 2) 0 0.5 ns |
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