| 전자부품 데이터시트 검색엔진 |
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SN74LS257B 데이터시트(PDF) 4 Page - ON Semiconductor |
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SN74LS257B 데이터시트(HTML) 4 Page - ON Semiconductor |
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4 / 8 page ![]() SN74LS257B SN74LS258B http://onsemi.com 4 FUNCTIONAL DESCRIPTION The LS257B and LS258B are Quad 2-Input Multiplexers with 3-state outputs. They select four bits of data from two sources each under control of a Common Data Select Input. When the Select Input is LOW, the I0 inputs are selected and when Select is HIGH, the I1 inputs are selected. The data on the selected inputs appears at the outputs in true (non-inverted) form for the LS257B and in the inverted form for the LS258B. The LS257B and LS258B are the logic implementation of a 4-pole, 2-position switch where the position of the switch is determined by the logic levels supplied to the Select Input. The logic equations for the outputs are shown below: When the Output Enable Input (E0) is HIGH, the outputs are forced to a high impedance “off” state. If the outputs are tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the maximum ratings. Designers should ensure that Output Enable signals to 3-state devices whose outputs are tied together are designed so there is no overlap. LS257B Za = E0 • (I1a • S + I0a • S) Zb = E0 • (I1b • S + I0b • S) Zc = E0 • (I1c • S + I0c • S) Zd = E0 • (I1d • S + I0d • S) LS258B Za = E0 • (I1a • S + I0a • S) Zb = E0 • (I1b • S + I0b • S) Zc = E0 • (I1c • S + I0c • S) Zd = E0 • (I1d • S + I0d • S) TRUTH TABLE OUTPUT ENABLE SELECT INPUT DATA INPUTS OUTPUTS LS257B OUTPUTS LS258B EO S I0 I1 Z Z H X X X (Z) (Z) L H X LL H L H X HH L L L L XL H L L H X H L H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care (Z) = High Impedance (off) |
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