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DS250DF230ZLSR 데이터시트(PDF) 49 Page - Texas Instruments

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부품명 DS250DF230ZLSR
상세설명  DS250DF230 25-Gbps Multi-Rate 2-Channel Retimer
PDF  105 Pages
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제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI - Texas Instruments

DS250DF230ZLSR 데이터시트(HTML) 49 Page - Texas Instruments

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DS250DF230
www.ti.com
SNLS590B – AUGUST 2018 – REVISED OCTOBER 2019
Product Folder Links: DS250DF230
Submit Documentation Feedback
Copyright © 2018–2019, Texas Instruments Incorporated
Table 10. Channel Registers, 0 to 39 (continued)
ADDRESS
(HEX)
BITS
DEFAULT
VALUE
(HEX)
MODE
EEPROM
FIELD NAME
DESCRIPTION
2E
7
0
RW
N
RESERVED
RESERVED
6
0
RW
N
RESERVED
RESERVED
5
0
R
N
EQ_BST3_BIT2_TO_EQ
Read-back of eq_BST3[2] driving the
EQ
4
0
RW
N
RESERVED
RESERVED
3
0
RW
N
RESERVED
RESERVED
2
0
RW
N
PRBS_PATTERN_SEL[2]
MSB for the PRBS_PATTERN_SEL
field. Lower bits are found on
Reg_0x30[1:0]. Refer to the Reg_0x30
description on this table.
1
0
RW
N
RESERVED
RESERVED
0
0
RW
N
RESERVED
RESERVED
2F
7
0
RW
Y
RESERVED
RESERVED
6
1
RW
Y
RATE[2]
Configure PPM register and divider for
a standard data rate.
(Refer to the Programming Guide for
more details)
5
0
RW
Y
RATE[1]
4
1
RW
Y
RATE[0]
3
0
RW
Y
INDEX_OV
If this bit is 1, then Reg_0x39 is to be
used as 4-bit index to the [15:0] array
of EQ settings. The EQ setting at that
index is loaded to the EQ boost
registers going to the analog and is
used as the starting point for adaption.
2
1
RW
Y
EN_PPM_CHECK
1: (Default) Enable the PPM to be
used as a qualifier when performing
Lock Detect
0: Remove the PPM check as a lock
qualifier.
1
0
RW
Y
RESERVED
DS250DF230:
1: Disable eq_bypass for first 4 indices
0: Enable eq_bypass for first 4 indices
0
0
RWSC
N
CTLE_ADAPT
1: Re-starts CTLE adaptation, self-
clearing



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