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BLUENRG-LP 데이터시트(PDF) 71 Page - STMicroelectronics

부품명 BLUENRG-LP
상세설명  Programmable Bluetooth® Low Energy wireless SoC
PDF  72 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

BLUENRG-LP 데이터시트(HTML) 71 Page - STMicroelectronics

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List of figures
Figure 1.
The BlueNRG-LP block diagram ........................................................ 4
Figure 2.
Bus matrix ....................................................................... 6
Figure 3.
BlueNRG-LP RF block diagram ........................................................ 9
Figure 4.
Power supply configuration .......................................................... 10
Figure 5.
Power supply domain overview........................................................ 11
Figure 6.
Clock tree ...................................................................... 15
Figure 7.
Pinout top view (QFN48 package) ...................................................... 22
Figure 8.
Pinout top view (QFN32 package) ...................................................... 23
Figure 9.
Pinout top view (WLCSP49 package) ................................................... 24
Figure 10.
Memory map .................................................................... 30
Figure 11.
Application circuit: DC-DC converter, QFN48 package ........................................ 31
Figure 12.
Application circuit: DC-DC converter, WCSP49 package ...................................... 32
Figure 13.
Application circuit: DC-DC converter, QFN32 package ........................................ 32
Figure 14.
Pin loading conditions .............................................................. 34
Figure 15.
Pin input voltage .................................................................. 35
Figure 16.
Recommended RSTN pin protection .................................................... 50
Figure 17.
SPI timing diagram - slave mode and CPHA = 0 ............................................ 54
Figure 18.
SPI timing diagram - slave mode and CPHA = 1 ............................................ 54
Figure 19.
SPI timing diagram - master mode ..................................................... 55
Figure 20.
QFN48 (6x6x0.9, pitch 0.4 mm) package outline ............................................ 56
Figure 21.
QFN48 (6x6x0.9, pitch 0.4 mm) detail A package information ................................... 57
Figure 22.
QFN48 (6x6x0.9, pitch 0.4 mm) recommended footprint....................................... 58
Figure 23.
QFN32 (5x5x0.9, pitch 0.5 mm) package outline ............................................ 59
Figure 24.
Detail A ........................................................................ 60
Figure 25.
QFN32 (5x5x0.9, pitch 0.5 mm) package information recommended footprint ........................ 61
Figure 26.
WLCSP49 (3.14x3.14x0.4, pitch 0.4 mm) package outline (bumps view) ........................... 62
Figure 27.
WLCSP49 (3.14x3.14x0.4, pitch 0.4 mm) recommended footprint ................................ 63
Figure 28.
Ordering information ............................................................... 65
BlueNRG-LP
List of figures
DS13282 - Rev 2
page 71/72



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