L6986H3V3 datasheet(45/68 Pages) STMICROELECTRONICS

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Figure 47. Two regulators synchronized

6.5.2

External synchronization signal

Multiple L6986H can be synchronized to an external frequency signal fed to the SYNCH pin. In this case the

regulator set is phased to the reference and all the devices will work with 0° phase shift.

The minimum synchronization pulse width is 100 ns and the frequency range of the synchronization signal is:

•

[275 kHz - 1.4 MHz] if fSW_PROGRAMMED < 500 kHz

•

[475 kHz - 2.2 MHz] if fSW_PROGRAMMED ≥ 500 kHz

(see Figure 48. Synchronization pulse definition).

Figure 48. Synchronization pulse definition

fSYNCHRO

100 nsec. min.

fSYNCHRO

100 nsec. min.

275 kHz < f

SYNCHRO < 1.4 MHz

if f

SW_PROGRAMMED < 500 kHz typ

475 kHz < f

SYNCHRO < 2.2 MHz

if f

SW_PROGRAMMED ≥ 500 kHz typ

Since the internal slope compensation contribution that is required to prevent subharmonic oscillations in peak

current mode architecture depends on the oscillator frequency, it is important to select the same oscillator

frequency for all regulators (all of them operate as SLAVE) as close as possible to the frequency of the reference

signal (please refer to Table 2). As a consequence all the regulators have the same resistor value connected to

the FSW pin, so the slope compensation is optimized accordingly with the frequency of the synchronization

signal. The slope compensation contribution is latched at power-up and so fixed during the device operation.

The L6986H normally operates in the MASTER mode, driving the SYNCH line at the selected oscillator frequency

as shown in Figure 49. L6986H synchronization driving capability.

L6986H

Synchronization (LNM)

DS12905 - Rev 2

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