| 전자부품 데이터시트 검색엔진 |
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L6986HTR 데이터시트(PDF) 42 Page - STMicroelectronics |
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L6986HTR 데이터시트(HTML) 42 Page - STMicroelectronics |
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42 / 68 page ![]() Figure 43. Voltage supervisor operation The comparator monitoring the FB voltage has four different programmable thresholds (80%, 87%, 93%, 96% nominal output voltage) for high flexibility (see MLF pin, Table 7. LNM/ LCM selection (L6986H3V3), Table 8. LNM/ LCM selection (L6986H5V), and Table 9. LNM/ LCM selection (L6986H)). When the RST comparator detects the output voltage is in regulation, a 2 mA internal current source starts to charge an external capacitor to implement a voltage ramp on the DELAY pin. The RST open collector is then released as soon as VDELAY = 1.234 V (see Figure 43. Voltage supervisor operation). The CDELAY is dimensioned as follows: CDELAY=ISSCH⋅TDELAY VDELAY =2μA⋅TDELAY 1.234V (41) The maximum suggested capacitor value is 270 nF. The L6986H also activates internal pull-down on RST pin in case overvoltage protection is triggered. As soon as the output voltage goes below OVP threshold (20% typ.), the 2 µA internal current source starts to charge an external capacitor to implement a voltage ramp on the DELAY pin. The RST open collector is then released as soon as VDELAY = 1.234 V(see figure below). L6986H Voltage supervisor DS12905 - Rev 2 page 42/68 |
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